A concept of “additive latency” (AL) has been introduced for the operation of memory systems to make command and data busses efficient for sustainable bandwidths. With additive latency commands may be issued to memory externally, but held by the memory internally prior to execution for the duration of AL in order to improve system scheduling. In particular, including AL can help avoid collision on the command bus and gaps in data input/output bursts.
Also as part of the AL concept, reordering of commands issued to the memory to improve scheduling has been considered. For example, in the event a write command to a bank of memory is issued to the memory prior to issuance of a read command to the same bank of memory, it may be more efficient to internally reorder the commands at the memory so that the read operation is performed before the write operation. Having AL for the read and write commands allows for the commands to be reordered and still meet timing specifications.
Already known is the concept of “precharging” a bank of memory following the completion of a read or write operation to the bank of memory. The precharge operation essentially “closes” the bank of memory, which must be later “opened” by an “activate” command before a subsequent read or write operation can be performed on the bank of memory. In order to precharge a bank of memory, a precharge command can be issued to a bank of memory, or a read or write command can be specified as having an “auto precharge” performed after the respective read or write operation to the bank of memory is completed.
Where a memory is capable of internally reordering commands it receives, managing precharge operations for a bank of memory must be given some consideration. Taking the previous example of having write and read commands internally reordered such that the read operation is performed prior to the write operation, performing a precharge of the bank of memory following the read operation (e.g., the read command is issued with an auto precharge) and before the write operation may negatively impact operational efficiency because the bank of memory will need to be opened again after it is closed by the auto precharge.
Therefore, there is a need for managing precharge operations for banks of memory in a memory having the ability to internally reorder commands issued to the memory.